1/8 september 2002 STW80NF55-08 n-channel 55v - 0.0065 w - 80a to-247 stripfet? power mosfet (1) starting t j = 25 c, i d = 40a, v dd = 40v (*) current limited by wire bonding n typical r ds (on) = 0.0065 w n exceptional dv/dt capability n 100% avalanche tested n low threshold drive description this power mosfet is the latest development of stmicroelectronics unique "single feature size?" strip-based process. the resulting transistor shows extremely high packing density for low on-resis- tance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. applications n dc-ac & dc-dc converters n high current, high speed switching n solenoid and relay drivers n motor control, audio amplifiers absolute maximum ratings ( l ) pulse width limited by safe operating area type v dss r ds(on) i d STW80NF55-08 55 v < 0.008 w 80 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 55 v v dgr drain-gate voltage (r gs = 20 k w ) 55 v v gs gate- source voltage 20 v i d (*) drain current (continuous) at t c = 25c 80 a i d drain current (continuous) at t c = 100c 80 a i dm ( l ) drain current (pulsed) 320 a p tot total dissipation at t c = 25c 300 w derating factor 2 w/c e as (1) single pulse avalanche energy 870 mj t stg storage temperature C65 to 175 c t j max. operating junction temperature 175 c to-247 1 2 3 internal schematic diagram
STW80NF55-08 2/8 thermal data electrical characteristics (t case = 25 c unless otherwise specified) off on (1) dynamic rthj-case thermal resistance junction-case max 0.5 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 55 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 234v r ds(on) static drain-source on resistance v gs = 10v, i d = 40 a 0.0065 0.008 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > 2.5 v , i d =18 a 20 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 3850 pf c oss output capacitance 800 pf c rss reverse transfer capacitance 250 pf
3/8 STW80NF55-08 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 27v, i d = 40a r g = 4.7 w v gs = 10v (see test circuit, figure 3) 25 ns t r rise time 85 ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 80v, i d = 80a, v gs = 10v 115 24 46 150 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off-delay time fall time v dd = 27v, i d = 40a, r g =4.7 w, v gs = 10v (see test circuit, figure 3) 70 25 ns ns t d(off) t f t c off-voltage rise time fall time cross-over time vclamp =44v, i d =80a r g =4.7 w, v gs = 10v (see test circuit, figure 5) 85 75 110 ns ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 80 a i sdm (1) source-drain current (pulsed) 320 a v sd (2) forward on voltage i sd = 80a, v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 80a, di/dt = 100a/s, v dd = 50v, t j = 150c (see test circuit, figure 5) 80 250 6.4 ns nc a thermal impedance safe operating area
STW80NF55-08 4/8 gate charge vs gate-source voltage tranconductance output characteristics capacitance variations tranfer characteristics static drain-source on resistance
5/8 STW80NF55-08 normalized breakdown voltage vs temperature normalized on resistance vs temperature normalized gate thereshold voltage vs temp. source-drain diode forward characteristics
STW80NF55-08 6/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/8 STW80NF55-08 dim. mm. inch min. typ max. min. typ. max. a 4.85 5.15 0.19 0.20 d 2.20 2.60 0.08 0.10 e 0.40 0.80 0.015 0.03 f 1 1.40 0.04 0.05 f1 3 0.11 f2 2 0.07 f3 2 2.40 0.07 0.09 f4 3 3.40 0.11 0.13 g 10.90 0.43 h 15.45 15.75 0.60 0.62 l 19.85 20.15 0.78 0.79 l1 3.70 4.30 0.14 0.17 l2 18.50 0.72 l3 14.20 14.80 0.56 0.58 l4 34.60 1.36 l5 5.50 0.21 m 2 3 0.07 0.11 v 5 o5o v2 60o 60o dia 3.55 3.65 0.14 0.143 to-247 mechanical data
STW80NF55-08 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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